MIPS Open Developer Day

by Wave Computing

Embassy Suites by the Las Vegas Convention Center

Don't miss this unique opportunity to Learn, Build and Innovate with MIPS technology!
About this Event

Are you interested in 'test driving' the RTL code of one of one of the smallest and lowest power industrial CPU cores?

Do you want to build a mathematical co-processor in an hour and see how it accelerates your C program?

Have you always wanted to watch a processor in slow motion, then see the cache line fill from memory and the pipeline data moving through bypasses in real time?

If yes, then attend Wave Computing's inaugural MIPS Open Developer Day to do all this and more!

During this hands-on workshop, you'll have the opportunity to build a complete MIPS technology-based SoC from scratch, integrating an FPGA with a sensor and custom User Defined Instruction (UDI) co-processor.

Wave Computing's MIPS Open initiative provides developers open access to the latest version of the MIPS 32- and 64-bit instruction set architecture and microAptiv cores - free of charge, without licensing or royalty fees.

Agenda:

12:30 - 1:15pm Welcome & Introduction *Lunch will be provided*

1:15 - 1:45pm Demo: MIPS Components in Action, including:

  • Synthesis and simulation of FPGA-based SoC, working on boards from Intel/Altera boards and a MIPS technology-based FPGA from Xilinx
  • MIPS FPGA design hierarchy
  • Plus, examples of sensor integration, CPU architecture and co-processor

1:45 - 2:00pm Break

2:00 - 3:30pm Hands-on Labs & Exercises, including:

  • Integrating a light sensor into software-hardware system
  • Observing CPU in slow motion, filling data cache and observing pipeline bypass
  • Examining hardware and software sides of an interrupt
  • Adding processor instructions to accelerate artificial intelligence (Al) using the MIPS CorExtend interface

3:30 - 3:45pm Break

3:45 - 4:45pm Build Your Own MIPS-based SoC

Project 1 - Integrate one of the sensors or actuators into the system. Peripheral options include a digital potentiometer, SPI joystick, 16-button keyboard, rotary shaft encoder or resistor ladder digital-to-analog converter. Or bring your own device!

Project 2 - Implement your own co-processor, adding instructions to the CPU pipeline. The instructions can work with complex numbers or interval arithmetic, or can be used to connect a number of CPU cores into a supercomputing mesh.

4:45 - 5:15pm Present Your innovation
*Exciting prizes for the winners*

5:15 - 5:30pm Wrap-up

Seating is limited so register today!
Who Should Attend
  • Processor architects
  • RTL designers moving into CPUs
  • Embedded software engineers
  • System-level EDA tool developers
  • University professors a/o graduate students with an emphasis in engineering
  • System-on-chip enthusiasts
What You Should Bring

A Windows or Linux notebook with three USB ports to connect with the FPGA board, the USB-to-UART cable and an external SSD . (*External SSDs will be provided.*)

Workshop Prerequisites

Sign up and activate a MIPS Open account - CLICK HERE

Accept the License Agreement and request the MIPS Open FPGA package in the downloads section - CLICK HERE

Date And Time

June 4, 2019
12:30 PM – 5:30 PM PDT

Location

Embassy Suites by Hilton Convention Center Las Vegas
3600 Paradise Road
Las Vegas, NV 89169
United States